MRC | Criteria | Characteristic |
---|
ADAQ | BODY LENGTH | 0.440 INCHES MAXIMUM" |
ADAT | BODY WIDTH | 0.240 INCHES MINIMUM AND 0.325 INCHES MAXIMUM" |
ADAU | BODY HEIGHT | 0.085 INCHES MAXIMUM" |
AEHX | MAXIMUM POWER DISSIPATION RATING | 910.0 MILLIWATTS" |
AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS" |
AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS" |
CBBL | FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND PROGRAMMABLE AND BIPOLAR AND W/ENABLE AND 3-STATE OUTPUT AND W/BUFFERED OUTPUT" |
CQSJ | INCLOSURE MATERIAL | CERAMIC AND GLASS" |
CQSZ | INCLOSURE CONFIGURATION | FLAT PACK" |
CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC" |
CQZP | INPUT CIRCUIT PATTERN | 10 INPUT" |
CWSG | TERMINAL SURFACE TREATMENT | SOLDER" |
CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 5.5 VOLTS MAXIMUM POWER SOURCE" |
CZEQ | TIME RATING PER CHACTERISTIC | 45.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 89.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT" |
CZER | MEMORY DEVICE TYPE | ROM" |
CZZZ | MEMORY CAPACITY | UNKNOWN" |
TEST | TEST DATA DOCUMENT | 82577-932820 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWI" |
TTQY | TERMINAL TYPE AND QUANTITY | 16 FLAT LEADS" |
ADAQ | BODY LENGTH | 0.440 INCHES MAXIMUM" |
ADAT | BODY WIDTH | 0.240 INCHES MINIMUM AND 0.325 INCHES MAXIMUM" |
ADAU | BODY HEIGHT | 0.085 INCHES MAXIMUM" |
AEHX | MAXIMUM POWER DISSIPATION RATING | 910.0 MILLIWATTS" |
AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS" |
AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS" |
CBBL | FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND PROGRAMMABLE AND BIPOLAR AND W/ENABLE AND 3-STATE OUTPUT AND W/BUFFERED OUTPUT" |
CQSJ | INCLOSURE MATERIAL | CERAMIC AND GLASS" |
CQSZ | INCLOSURE CONFIGURATION | FLAT PACK" |
CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC" |
CQZP | INPUT CIRCUIT PATTERN | 10 INPUT" |
CWSG | TERMINAL SURFACE TREATMENT | SOLDER" |
CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 5.5 VOLTS MAXIMUM POWER SOURCE" |
CZEQ | TIME RATING PER CHACTERISTIC | 45.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 89.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT" |
CZER | MEMORY DEVICE TYPE | ROM" |
CZZZ | MEMORY CAPACITY | UNKNOWN" |
TEST | TEST DATA DOCUMENT | 82577-932820 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWI" |
TTQY | TERMINAL TYPE AND QUANTITY | 16 FLAT LEADS" |