MRC | Criteria | Characteristic |
---|
ADAQ | BODY LENGTH | 0.840 INCHES MAXIMUM" |
ADAT | BODY WIDTH | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM" |
ADAU | BODY HEIGHT | 0.185 INCHES MAXIMUM" |
AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS" |
AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS" |
CBBL | FEATURES PROVIDED | 3-STATE OUTPUT AND HERMETICALLY SEALED AND W/COMMON ENABLE" |
CQSJ | INCLOSURE MATERIAL | CERAMIC OR GLASS OR METAL" |
CQSZ | INCLOSURE CONFIGURATION | DUAL-IN-LINE" |
CQWX | OUTPUT LOGIC FORM | COMPLEMENTARY-METAL OXIDE-SEMICONDUCTOR LOGIC" |
CQZP | INPUT CIRCUIT PATTERN | QUAD 2 INPUT" |
CSSL | DESIGN FUNCTION AND QUANTITY | 4 LATCH, R/S" |
CTFT | CASE OUTLINE SOURCE AND DESIGNATOR | D-2 MIL-M-38510" |
CWSG | TERMINAL SURFACE TREATMENT | SOLDER AND GOLD AND TIN" |
CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -0.5 VOLTS MINIMUM POWER SOURCE AND 18.0 VOLTS MAXIMUM POWER SOURCE" |
CZEQ | TIME RATING PER CHACTERISTIC | 350.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 350.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT" |
PMLC | PRECIOUS MATERIAL AND LOCATION | TERMINAL SURFACES OPTIONAL GOLD" |
PRMT | PRECIOUS MATERIAL | GOLD" |
TEST | TEST DATA DOCUMENT | 30003-410AS520 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRA" |
TTQY | TERMINAL TYPE AND QUANTITY | 16 PRINTED CIRCUIT" |
ADAQ | BODY LENGTH | 0.840 INCHES MAXIMUM" |
ADAT | BODY WIDTH | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM" |
ADAU | BODY HEIGHT | 0.185 INCHES MAXIMUM" |
AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS" |
AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS" |
CBBL | FEATURES PROVIDED | 3-STATE OUTPUT AND HERMETICALLY SEALED AND W/COMMON ENABLE" |
CQSJ | INCLOSURE MATERIAL | CERAMIC OR GLASS OR METAL" |
CQSZ | INCLOSURE CONFIGURATION | DUAL-IN-LINE" |
CQWX | OUTPUT LOGIC FORM | COMPLEMENTARY-METAL OXIDE-SEMICONDUCTOR LOGIC" |
CQZP | INPUT CIRCUIT PATTERN | QUAD 2 INPUT" |
CSSL | DESIGN FUNCTION AND QUANTITY | 4 LATCH, R/S" |
CTFT | CASE OUTLINE SOURCE AND DESIGNATOR | D-2 MIL-M-38510" |
CWSG | TERMINAL SURFACE TREATMENT | SOLDER AND GOLD AND TIN" |
CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -0.5 VOLTS MINIMUM POWER SOURCE AND 18.0 VOLTS MAXIMUM POWER SOURCE" |
CZEQ | TIME RATING PER CHACTERISTIC | 350.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 350.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT" |
PMLC | PRECIOUS MATERIAL AND LOCATION | TERMINAL SURFACES OPTIONAL GOLD" |
PRMT | PRECIOUS MATERIAL | GOLD" |
TEST | TEST DATA DOCUMENT | 30003-410AS520 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRA" |
TTQY | TERMINAL TYPE AND QUANTITY | 16 PRINTED CIRCUIT" |